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구인정보

홈 홈 > 알림마당 > 구인구직 > 구인정보
연구원 Research Fellow in Analogue IC Design
마감일 2019. 12. 11
기관명 [국외]  Imperial College London      바로가기 ☞   자세한 내용은 홈페이지 확인바랍니다.
학력 박사

Research Fellow in Analogue IC Design
Department of Electrical and Electronic Engineering
Imperial College London, UK

Closing date : December 11, 2019

Job summary
The position will be part of the FORTE (Functional Oxide Reconfigurable Technologies) project that has been supported by EPSRC through a 5-year, £6M collaborative programme grant between Southampton, Imperial and Manchester (see www.imperial.ac.uk/next-generation-neural-interfaces/projects/forte/ and www.forte.ac.uk). This programme aims to develop a new integrated technology that extends CMOS technology to include ReRAM devices, and exploits this in emerging applications in AI and medical devices.

Duties and responsibilities
The postholder will join a highly dedicated team at Imperial with overall responsibility of CMOS technology integration – including design tool and process design kit integration, design and prototyping test devices, structures, circuits and systems, and co-ordinating/supporting the dedicated engineering runs with the CMOS foundry partner. This role of this position specifically will be to lead the CMOS technology integration efforts. You will be responsible for EDA tool and design kit integration and develop a library of analogue cells for wide dissemination and use throughout the consortium. You will also be leading and co-ordinating the dedicated engineering runs in CMOS technology. For this you will be the key point of contact between the FORTE consortium, foundry interface and other project partners.

Essential requirements
For this role we are seeking a senior analogue IC designer with PhD degree or relevant industry experience. The ideal candidate should have deep experience working with advanced CMOS PDKs and all aspects of a full-custom EDA tool flow, have strong analogue and mixed-signal transistor-level CMOS design experience, and first-hand experience of multiple successful mixed signal designs, from concept to silicon-verified measurements.

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